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ADC082500 Datasheet

Part Number ADC082500
Manufacturers National Semiconductor
Logo National Semiconductor
Description 2.5 GSPS A/D Converter
Datasheet ADC082500 DatasheetADC082500 Datasheet (PDF)

www.DataSheet4U.com ADC082500 High Performance, Low Power, 8-Bit, 2.5 GSPS A/D Converter ADVANCE INFORMATION August 2006 ADC082500 High Performance, Low Power, 8-Bit, 2.5 GSPS A/D Converter General Description Note: This product is currently in development. - ALL specifications are design targets and are subject to change. The ADC082500 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 3.4 GSPS. Consum.

  ADC082500   ADC082500






2.5 GSPS A/D Converter

www.DataSheet4U.com ADC082500 High Performance, Low Power, 8-Bit, 2.5 GSPS A/D Converter ADVANCE INFORMATION August 2006 ADC082500 High Performance, Low Power, 8-Bit, 2.5 GSPS A/D Converter General Description Note: This product is currently in development. - ALL specifications are design targets and are subject to change. The ADC082500 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 3.4 GSPS. Consuming a typical 1.8 Watts at 2.5 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-andhold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters up to Nyquist, producing a high 7.0 ENOB with a 748 MHz input Signal. A 2.5 GHz sample rate will provide a 10-18 B.E.R. The ADC082500 achieves a 2.5GSPS sampling rate by utilizing both the rising and falling edge of a 1.25 GSPS input clock. Output formatting is offset binary and the LVDS digital outputs are compliant with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V. The ADC has a 1:4 demultiplexer that feeds four LVDS buses and reduces the output data rate on each bus to a quarter of the sampling rate. The ADC can be programmed into the 1:.


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