ADC12DS080

ADC12DS080 www.ti.com SNAS443A – MARCH 2008 – REVISED MARCH 2013 ADC12DS080 Dual 12-Bit, 80 MSPS A/D Converter with Serial LVDS Outputs Check for Samples: ADC12DS080 FEATURES 1 2 Clock Duty Cycle Stabilizer Single +3.0 or 3.3V Supply Operation Serial LVDS Outputs Serial Control Interface Overrange Outputs 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) KEY SPECIFICATIONS Resolution: 12 Bits Conversion Rate: 80 MSPS SNR (fIN = 170 MHz): 70 dBFS (typ) SFDR (fIN = 170 MHz): 81 dBFS (typ) Full Power Bandwidth: 1 GHz (typ) Power Consumption: 800 mW (typ) APPLICATIONS High IF Sampling Receivers Wireless Base Station Receivers Test and Measurement Equipment Communications Instrumentation Portable Instrumentation DESCRIPTION The ADC12DS080 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. The ADC12DS080 may be operated from a single +3.0V or 3.3V power supply. A powerdown feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential i...