ADC14DC080
www.ti.com
SNAS463B – SEPTEMBER 2008 – REVISED APRIL 2013
ADC14DC080 Dual 14-Bit, 80 MSPS A/D Converter wi...
ADC14DC080
www.ti.com
SNAS463B – SEPTEMBER 2008 – REVISED APRIL 2013
ADC14DC080 Dual 14-Bit, 80 MSPS A/D Converter with
CMOS Outputs
Check for Samples: ADC14DC080
FEATURES
1
2 Internal Sample-and-Hold Circuit and Precision Reference
Low Power Consumption Clock Duty Cycle Stabilizer Single +3.0V Supply Operation Power-Down Mode Offset Binary or 2's Complement Output Data
Format 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm
Pin-Pitch)
APPLICATIONS
High IF Sampling Receivers Wireless Base Station Receivers Test and Measurement Equipment Communications Instrumentation Portable Instrumentation
KEY SPECIFICATIONS
Resolution 14 Bits Conversion Rate 80 MSPS SNR (fIN = 170 MHz) 71 dBFS (typ) SFDR (fIN = 170 MHz) 83 dBFS (typ) Full Power Bandwidth 1 GHz (typ) Power Consumption 600 mW (typ)
DESCRIPTION
The ADC14DC080 is a high-performance
CMOS analog-to-digital converter capable of converting two analog input signals into 14-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). These converters use a differential, pipelined architecture with digital error correction and an on-chip sampleand-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sampleand-hold stage yields a full-power bandwidth of 1 GHz. The ADC14DC080 may be operated from a single +3.0V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast w...