ADC3243

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADC3241, ADC3242, ADC3243, ADC3244 SBAS671C – JULY 2014 – REVISED MARCH 2016 ADC324x Dual-Channel, 14-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converters 1 Features 1 Dual Channel 14-Bit Resolution Single Supply: 1.8 V Serial LVDS Interface (SLVDS) Flexible Input Clock Buffer with Divide-by-1, -2, -4 SNR = 72.4 dBFS, SFDR = 87 dBc at fIN = 70 MHz Ultra-Low Power Consumption: – 116 mW/Ch at 125 MSPS Channel Isolation: 105 dB Internal Dither and Chopper Support for Multi-Chip Synchronization Pin-to-Pin Compatible with 12-Bit Version Package: VQFN-48 (7 mm × 7 mm) 2 Applications Multi-Carrier, Multi-Mode Cellular Base Stations Radar and Smart Antenna Arrays Munitions Guidance Motor Control Feedback Network and Vector Analyzers Communications Test Equipment Nondestructive Testing Microwave Receivers Software-Defined Radios (SDRs) Quadrature and Diversity Radio Receivers Handheld Radio and Instrumentation 3 Description The ADC324x are a high-linearity, ultra-low power, dual-channel, 14-bit, 25-MSPS to 125-MSPS, analogto-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC324x family supp...