ADC32RF45

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design ADC32RF45 SBAS747C – MAY 2016 – REVISED DECEMBER 2016 ADC32RF45 Dual-Channel, 14-Bit, 3.0-GSPS, Analog-to-Digital Converter 1 Features 1 14-Bit, Dual-Channel, 3.0-GSPS ADC Noise Floor: –155 dBFS/Hz RF Input Supports Up to 4.0 GHz Aperture Jitter: 90 fS Channel Isolation: 95 dB at fIN = 1.8 GHz Spectral Performance (fIN = 900 MHz, –2 dBFS): – SNR: 60.9 dBFS – SFDR: 67-dBc HD2, HD3 – SFDR: 77-dBc Worst Spur Spectral Performance (fIN = 1.78 GHz, –2 dBFS): – SNR: 58.8 dBFS – SFDR: 66-dBc HD2, HD3 – SFDR: 75-dBc Worst Spur On-Chip Digital Down-Converters: – Up to 4 DDCs (Dual-Band Mode) – Up to 3 Independent NCOs per DDC On-Chip Input Clamp for Overvoltage Protection Programmable On-Chip Power Detectors with Alarm Pins for AGC Support On-Chip Dither On-Chip Input Termination Input Full-Scale: 1.35 VPP Support for Multi-Chip Synchronization JESD204B Interface: – Subclass 1-Based Deterministic Latency – 4 Lanes Per Channel at 12.5 Gbps Power Dissipation: 3.2 W/Ch at 3.0 GSPS 72-Pin VQFN Package (10 mm × 10 mm) 2 Applications Multi-Band, Multi-Mode 2G, 3G, 4G Cellular Receivers Phased Array Radars Electronic Warfare Cable Infrastructure Broadband Wireless High-Speed Digitizers Software-Defined Radios Communications Test Equipment Microwave and Millimeter Wave Receivers 3 Description The ADC32RF45 device is a 14-bit, 3.0-GSPS,...