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5-Bit Programmable Synchronous Controller for Pentium® III Processors ADP3157
FUNCTIONAL BLOCK DIAGRAM
VCC DRIVE1 DRIVE2 PGND AGND PWRGD SENSE+ SENSE– DELAY NONOVERLAP DRIVE VREF +15% 2R CROWBAR IN CMPI Q S R gm VREF REFERENCE 1.20V VID0 SENSE– VID1 VID2 R VT1 VREF +5% VREF –5%
FEATURES Active Voltage Positioning with Gain and Offset Adjustment Optimal C...
