Data Sheet
Dual 3 MHz, 1200 mA Buck Regulators with Two 300 mA LDOs
ADP5034
FEATURES
regulators operate in PWM mode w...
Data Sheet
Dual 3 MHz, 1200 mA Buck Regulators with Two 300 mA LDOs
ADP5034
FEATURES
regulators operate in PWM mode when the load is above a pre-
Main input
voltage range: 2.3 V to 5.5 V Two 1200 mA buck regulators and two 300 mA LDOs 24-lead, 4 mm × 4 mm LFCSP or 28-lead TSSOP package
defined threshold. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency.
Regulator accuracy: ±1.8% Factory programmable or external adjustable VOUTx 3 MHz buck operation with forced PWM and auto PWM/PSM
Table 1. Family Models
Model Channels
Maximum Current Package
modes BUCK1/BUCK2: output
voltage range from 0.8 V to 3.8 V LDO1/LDO2: output
voltage range from 0.8 V to 5.2 V LDO1/LDO2: input supply
voltage from 1.7 V to 5.5 V LDO1/LDO2: high PSRR and low output noise
ADP5023 2 Buck,1 LDO ADP5024 2 Buck,1 LDO ADP5034 2 Buck,2 LDOs
800 mA, 300 mA
1.2 A, 300 mA
1.2 A, 300 mA
LFCSP (CP-24-10)
LFCSP (CP-24-10)
LFCSP (CP-24-10), TSSOP (RE-28-1)
APPLICATIONS
ADP5037 2 Buck,2 LDOs
800 mA, 300 mA
LFCSP (CP-24-10)
Power for processors, ASICS, FPGAs, and RF chipsets Portable instrumentation and medical devices
ADP5033 2 Buck,2 LDOs with 800 mA,
2 EN pins
300 mA
WLCSP (CB-16-8)
Space constrained devices
The two bucks operate out of phase to reduce the input capaci-
GENERAL DESCRIPTION
The ADP5034 combines two high performance buck regulators and two low dropout (LDO) regulators. It is available ...