ANALOG-TO-DIGITAL CONVERTER. ADS1212 Datasheet

ADS1212 Datasheet PDF


Part Number

ADS1212

Description

22-Bit ANALOG-TO-DIGITAL CONVERTER

Manufacture

Burr-Brown

Total Page 30 Pages
Datasheet
Download ADS1212 Datasheet


ADS1212
ADS1212
ADS1213
ADS1212
ADS1213
ADS1213
ADS1212
ADS1213
SBAS064B – JANUARY 1996 – REVISED FEBRUARY 2004
22-Bit ANALOG-TO-DIGITAL CONVERTER
FEATURES
q DELTA-SIGMA A/D CONVERTER
q 22 BITS NO MISSING CODES
q 20 BITS EFFECTIVE RESOLUTION AT 10Hz
AND 16 BITS AT 1000Hz
q LOW POWER: 1.4mW
q DIFFERENTIAL INPUTS
q PROGRAMMABLE GAIN AMPLIFIER
q SPICOMPATIBLE SSI INTERFACE
q PROGRAMMABLE CUTOFF FREQUENCY
UP TO 6.25kHz
q INTERNAL/EXTERNAL REFERENCE
q ON-CHIP SELF-CALIBRATION
q ADS1213 INCLUDES 4-CHANNEL MUX
APPLICATIONS
q INDUSTRIAL PROCESS CONTROL
q INSTRUMENTATION
q BLOOD ANALYSIS
q SMART TRANSMITTERS
q PORTABLE INSTRUMENTS
q WEIGH SCALES
q PRESSURE TRANSDUCERS
AGND AVDD REFOUT
DESCRIPTION
The ADS1212 and ADS1213 are precision, wide dynamic
range, delta-sigma Analog-to-Digital (A/D) converters with
24-bit resolution operating from a single +5V supply. The
differential inputs are ideal for direct connection to transduc-
ers or low-level voltage signals. The delta-sigma architec-
ture is used for wide dynamic range and to ensure 22 bits of
no-missing-code performance. An effective resolution of 20
bits is achieved through the use of a very low-noise input
amplifier at conversion rates up to 10Hz. Effective resolu-
tions of 16 bits can be maintained up to a sample rate of
1kHz through the use of the unique Turbo Modulator mode
of operation. The dynamic range of the converters is further
increased by providing a low-noise programmable gain
amplifier with a gain range of 1 to 16 in binary steps.
The ADS1212 and ADS1213 are designed for high-resolution
measurement applications in smart transmitters, industrial
process control, weigh scales, chromatography and portable
instrumentation. Both converters include a flexible synchro-
nous serial interface that is SPI compatible and also offers a
two-wire control mode for low-cost isolation.
The ADS1212 is a single channel converter and is offered in
both DIP-18 and SO-18 packages. The ADS1213 includes a
4-channel input multiplexer and is available in DIP-24,
SO-24, and SSOP-28 packages.
REFIN
VBIAS
XIN XOUT
AIN1P
AIN1N
AIN2P
AIN2N
AIN3P
AIN3N
AIN4P
AIN4N
MUX
ADS1213 Only
PATENTS PENDING
AINP
AINN
+2.5V
Reference
+3.3V Bias
Generator
Clock Generator
PGA
Second-Order
∆∑
Modulator
Third-Order
Digital Filter
Micro Controller
Instruction Register
Command Register
Data Output Register
Offset Register
Full-Scale Register
Modulator Control
Serial Interface
DGND
DVDD
SCLK
SDIO
SDOUT
ADS1212, 1213
DSYNC
CS MODE DRDY
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
Copyright © 1996-2004, Texas Instruments Incorporated

ADS1212
SPECIFICATIONS
All specifications TMIN to TMAX, AVDD = DVDD = +5V, fXIN = 1MHz, programmable gain amplifier setting of 1, Turbo Mode Rate of 1, REFOUT disabled, VBIAS disabled,
and external 2.5V reference, unless otherwise specified.
PARAMETER
ANALOG INPUT
Input Voltage Range(1)
Input Impedance
Programmable Gain Amplifier
Input Capacitance
Input Leakage Current
SYSTEMS PERFORMANCE
No Missing Codes
Integral Linearity
Integral Linearity (Single-Ended)
Unipolar Offset Error(4)
Unipolar Offset Drift(6)
Gain Error(4)
Gain Error Drift(6)
Common-Mode Rejection(9)
Normal-Mode Rejection
Output Noise
Power Supply Rejection
VOLTAGE REFERENCE
Internal Reference (REFOUT)
Drift
Noise
Load Current
Output Impedance
External Reference (REFIN)
Load Current
VBIAS Output
Drift
Load Current
DIGITAL INPUT/OUTPUT
Logic Family
Logic Level: (all except XIN)
VIH
VIL
VOH
VOL
XIN Input Levels: VIH
VIL
XIN Frequency Range (fXIN)
Output Data Rate (fDATA)
Data Format
SYSTEM CALIBRATION
Offset and Full-Scale Limits
VFS – | VOS |
CONDITIONS
ADS1212U, P/ADS1213U, P, E
MIN TYP MAX
UNITS
With VBIAS(2)
G = Gain, TMR = Turbo Mode Rate
User Programmable: 1, 2, 4, 8, or 16
At +25°C
TMIN to TMAX
fDATA = 10Hz
fDATA = 60Hz
fDATA = 100Hz, TMR of 4
fDATA = 250Hz, TMR of 8
fDATA = 500Hz, TMR of 16
fDATA = 1000Hz, TMR of 16
fDATA = 60Hz
fDATA = 1000Hz, TMR of 16
At DC, TMIN to TMAX
50Hz, fDATA = 50Hz(7)
60Hz, fDATA = 60Hz(7)
50Hz, fDATA = 50Hz(7)
60Hz, fDATA = 60Hz(7)
DC, 50Hz, and 60Hz
0 +5
–10 +10
20/(G • TMR)(3)
1 16
5
5 50
1
22
19
21
20
20
18
±0.0015
±0.0015
0.01
See Note 5
1
See Note 5
4
90 100
160
160
100
100
See Typical Performance Curves
60
Source or Sink
Using Internal Reference
Source or Sink
2.4
2.0
3.15
2.5 2.6
25
50
1
2
3.0
2.5
3.3 3.45
50
10mA
IIH = +5µA
IIL = +5µA
IOH = 2 TTL Loads
IOL = 2 TTL Loads
User Programmable and TMR = 1 to 16
fXIN = 500kHz
fXIN = 2.5MHz
User Programmable
2.0
–0.3
2.4
3.5
–0.3
0.5
0.96
0.48
2.4
TTL Compatible CMOS
DVDD +0.3
0.8
Two’s Complement
or Offset Binary
0.4
DVDD +0.3
0.8
2.5
6,250
3,125
15,625
VFS = Full-Scale Differential Voltage(8) 0.7 • (2 • REFIN)/G
VOS = Offset Differential Voltage(8)
1.3 • (2 • REFIN)/G
V
V
M
pF
pA
nA
Bits
Bits
Bits
Bits
Bits
Bits
%FSR
%FSR
%FSR
ppm/°C
ppm/°C
dB
dB
dB
dB
dB
dB
V
ppm/°C
µVp-p
mA
V
µA
V
ppm/°C
V
V
V
V
V
V
MHz
Hz
Hz
Hz
2 ADS1212, 1213
SBAS064A





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