ADSP-2191M

a DSP Microcomputer ADSP-2191M PERFORMANCE FEATURES 6.25 ns Instruction Cycle Time, for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy to Use Algebraic Syntax Single-Cycle Instruction Execution Single-Cycle Context Switch between Two Sets of Com- putation and Memory Instructions Instruction Cache Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions Pipelined Architecture Supports Efficient Code Execution Architectural Enhancements for Compiled C and C++ Code Efficiency Architectural Enhancements beyond ADSP-218x Family are Supported with Instruction Set Extensions for Added Registers, and Peripherals Flexible Power Management with User-Selectable Power-Down and Idle Modes FUNCTIONAL BLOCK DIAGRAM INTERNAL MEMORY FOUR INDEPENDENT BLOCKS BLOCK0 BLOCK1 BLOCK2 BLOCK3 ADSP-219x DSP CORE CACHE 64 ؋ 24-BIT ADDRESS 24 BIT DATA ADDRESS 24 BIT DATA ADDRESS 16 BIT DATA ADDRESS 16 BIT DATA JTAG TEST & EMULATI...