Microcontroller. AT32UC3C1256C Datasheet

AT32UC3C1256C Datasheet PDF

Part AT32UC3C1256C
Description 32-bit AVR Microcontroller
Feature Features • High Performance, Low Power 32-bit AVR® Microcontroller – Compact Single-cycle RISC Instr.
Manufacture ATMEL Corporation
Datasheet
Download AT32UC3C1256C Datasheet




AT32UC3C1256C
Features
High Performance, Low Power 32-bit AVR® Microcontroller
– Compact Single-cycle RISC Instruction Set Including DSP Instruction Set
– Built-in Floating-Point Processing Unit (FPU)
– Read-Modify-Write Instructions and Atomic Bit Manipulation
– Performing 1.49 DMIPS / MHz
• Up to 91 DMIPS Running at 66 MHz from Flash (1 Wait-State)
• Up to 49 DMIPS Running at 33 MHz from Flash (0 Wait-State)
– Memory Protection Unit
Multi-hierarchy Bus System
– High-Performance Data Transfers on Separate Buses for Increased Performance
– 16 Peripheral DMA Channels Improves Speed for Peripheral Communication
Internal High-Speed Flash
– 512 Kbytes, 256 Kbytes, 128 Kbytes, 64 Kbytes Versions
– Single Cycle Access up to 33 MHz
– FlashVaultTechnology Allows Pre-programmed Secure Library Support for End
User Applications
– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
– 100,000 Write Cycles, 15-year Data Retention Capability
– Flash Security Locks and User Defined Configuration Area
Internal High-Speed SRAM, Single-Cycle Access at Full Speed
– 64 Kbytes (512 KB and 256 KB Flash), 32 Kbytes (128 KB Flash), 16 Kbytes (64 KB
Flash)
– 4 Kbytes on the Multi-Layer Bus System (HSB RAM)
External Memory Interface on AT32UC3C0 Derivatives
– SDRAM / SRAM Compatible Memory Bus (16-bit Data and 24-bit Address Buses)
Interrupt Controller
– Autovectored Low Latency Interrupt Service with Programmable Priority
System Functions
– Power and Clock Manager
– Internal 115KHz (RCSYS) and 8MHz/1MHz (RC8M) RC Oscillators
– One 32 KHz and Two Multipurpose Oscillators
– Clock Failure detection
– Two Phase-Lock-Loop (PLL) allowing Independent CPU Frequency from USB or
CAN Frequency
Windowed Watchdog Timer (WDT)
Asynchronous Timer (AST) with Real-Time Clock Capability
– Counter or Calendar Mode Supported
Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency
Ethernet MAC 10/100 Mbps interface
– 802.3 Ethernet Media Access Controller
– Supports Media Independent Interface (MII) and Reduced MII (RMII)
Universal Serial Bus (USB)
– Device 2.0 and Embedded Host Low Speed and Full Speed
– Flexible End-Point Configuration and Management with Dedicated DMA Channels
– On-chip Transceivers Including Pull-Ups
One 2-channel Controller Area Network (CAN)
– CAN2A and CAN2B protocol compliant, with high-level mailbox system
– Two independent channels, 16 Message Objects per Channel
32-bit AVR®
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32117D–AVR–01/12



AT32UC3C1256C
AT32UC3C
One 4-Channel 20-bit Pulse Width Modulation Controller (PWM)
– Complementary outputs, with Dead Time Insertion
– Output Override and Fault Protection
Two Quadrature Decoders
One 16-channel 12-bit Pipelined Analog-To-Digital Converter (ADC)
– Dual Sample and Hold Capability Allowing 2 Synchronous Conversions
– Single-Ended and Differential Channels, Window Function
Two 12-bit Digital-To-Analog Converters (DAC), with Dual Output Sample System
Four Analog Comparators
Six 16-bit Timer/Counter (TC) Channels
– External Clock Inputs, PWM, Capture and Various Counting Capabilities
One Peripheral Event Controller
– Trigger Actions in Peripherals Depending on Events Generated from Peripherals or from Input Pins
– Deterministic Trigger
– 34 Events and 22 Event Actions
Five Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Independent Baudrate Generator, Support for SPI, LIN, IrDA and ISO7816 interfaces
– Support for Hardware Handshaking, RS485 Interfaces and Modem Line
Two Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signals
One Inter-IC Sound (I2S) Controller
– Compliant with I2S Bus Specification
– Time Division Multiplexed mode
Three Master and Three Slave Two-Wire Interfaces (TWI), 400kbit/s I2C-compatible
QTouch® Library Support
– Capacitive Touch Buttons, Sliders, and Wheels
– QTouch® and QMatrix® Acquisition
On-Chip Non-intrusive Debug System
– Nexus Class 2+, Runtime Control, Non-Intrusive Data and Program Trace
– aWiresingle-pin programming trace and debug interface muxed with reset pin
– NanoTraceprovides trace capabilities through JTAG or aWire interface
3 package options
– 64-pin QFN/TQFP (45 GPIO pins)
– 100-pin TQFP (81 GPIO pins)
– 144-pin LQFP (123 GPIO pins)
Two operating voltage ranges:
– Single 5V Power Supply
– Single 3.3V Power Supply
32117D–AVR-01/12
2




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