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BSP108

NXP

N-channel enhancement mode vertical D-MOS transistor

DISCRETE SEMICONDUCTORS DATA SHEET BSP108 N-channel enhancement mode vertical D-MOS transistor Product specification Fi...


NXP

BSP108

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DISCRETE SEMICONDUCTORS DATA SHEET BSP108 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and intended for use in relay, high-speed and line-transformer drivers. FEATURES Direct interface to C-MOS, TTL, etc. High-speed switching No secondary breakdown PINNING - SOT223 1 2 3 4 = gate = drain = source = drain ID = 500 mA; VGS = 10 V Transfer admittance ID = 500 mA; VDS = 15 V  Yfs  RDS(on) QUICK REFERENCE DATA Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source ON-resistance VDS ± VGSO ID Ptot BSP108 max. max. max. max. typ. max. 80 V 20 V 500 mA 1.5 W 2.0 Ω 3.0 Ω min. typ. 150 mS 300 mS Marking code BSP108 PIN CONFIGURATION handbook, halfpage 4 d g 1 Top view 2 3 MAM054 s Fig.1 Simplified outline and symbol. April 1995 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Drain current (peak) Total power dissipation up to Tamb = 25 °C (note 1) Storage temperature range Junction temperature THERMAL RESISTAN...




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