DISCRETE SEMICONDUCTORS
DATA SHEET
BSP127 N-channel enhancement mode vertical D-MOS transistor
Product specification Fi...
DISCRETE SEMICONDUCTORS
DATA SHEET
BSP127 N-channel enhancement mode vertical D-MOS transistor
Product specification File under Discrete Semiconductors, SC13b April 1995
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
FEATURES Direct interface to C-MOS, TTL, etc. High-speed switching No secondary breakdown. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT223 envelope and intended for use as a line current interruptor in telephone sets and for applications in relay, high-speed and line transformer drivers. PINNING - SOT223
1 2 3
MAM054
BSP127
QUICK REFERENCE DATA SYMBOL VDS ID RDS(on) VGS(th) PARAMETER drain-source
voltage DC drain current drain-source on-resistance gate-source threshold
voltage MAX. 270 350 8 2 V mA Ω V UNIT
handbook, halfpage
4
d
g
s
PIN 1 2 3 4 gate drain
DESCRIPTION Code: BSP127
Top view
source drain
Fig.1 Simplified outline (SOT223) and symbol.
LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL VDS ±VGSO ID IDM Ptot Tstg Tj PARAMETER drain-source
voltage gate-source
voltage DC drain current peak drain current total power dissipation storage temperature range junction temperature up to Tamb = 25 °C (note 1) open drain CONDITIONS − − − − − −65 − MIN. MAX. 270 20 350 1.4 1.5 150 150 UNIT V V mA A W °C °C
THERMAL RESISTANCE SYMBOL Rth j-a Note 1. Device mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the...