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BUK102-50GL

NXP

PowerMOS transistor Logic level TOPFET

Philips Semiconductors Product specification PowerMOS transistor Logic level TOPFET DESCRIPTION Monolithic temperature...


NXP

BUK102-50GL

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Philips Semiconductors Product specification PowerMOS transistor Logic level TOPFET DESCRIPTION Monolithic temperature and overload protected logic level power MOSFET in a 3 pin plastic envelope, intended as a general purpose switch for automotive systems and other applications. BUK102-50GL QUICK REFERENCE DATA SYMBOL VDS ID PD Tj RDS(ON) PARAMETER Continuous drain source voltage Continuous drain current Total power dissipation Continuous junction temperature Drain-source on-state resistance VIS = 5 V MAX. 50 45 125 150 35 UNIT V A W ˚C mΩ APPLICATIONS General controller for driving lamps motors solenoids heaters FEATURES Vertical power DMOS output stage Low on-state resistance Overload protection against over temperature Overload protection against short circuit load Latched overload protection reset by input 5 V input level Low threshold voltage also allows 5 V control Control of power MOSFET and supply of overload protection circuits derived from input ESD protection on input pin Overvoltage clamping for turn off of inductive loads FUNCTIONAL BLOCK DIAGRAM DRAIN O/V CLAMP INPUT RIG POWER MOSFET LOGIC AND PROTECTION SOURCE Fig.1. Elements of the TOPFET. PINNING - TO220AB PIN 1 2 3 tab input drain source drain DESCRIPTION PIN CONFIGURATION tab SYMBOL D TOPFET I P 1 23 S January 1993 1 Rev 1.200 Philips Semiconductors Product specification PowerMOS transistor Logic level TOPFET LIMITING VALUES Limiting values in accordance with the Absolute Maximum Rat...




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