LF
BUK9K29-100E
28 March 2013
PA K
56D
Dual N-channel TrenchMOS logic level FET
Product data sheet
1. General desc...
LF
BUK9K29-100E
28 March 2013
PA K
56D
Dual N-channel TrenchMOS logic level FET
Product data sheet
1. General description
Dual logic level N-channel
MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications.
2. Features and benefits
Q101 compliant Repetitive avalanche rated Suitable for thermally demanding environments due to 175 °C rating True logic level gate with VGS(th) > 0.5 V @ 175 °C
3. Applications
12 V Automotive systems Motors, lamps and solenoid control Start-stop micro-hybrid applications Transmission control Ultra high performance power switching
4. Quick reference data
Table 1. Symbol VDS ID Ptot Tj RDSon Quick reference data Parameter drain-source
voltage drain current total power dissipation junction temperature Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 5 V; Tmb = 25 °C; Fig. 1 Tmb = 25 °C; Fig. 2 Min -55 Typ Max 100 30 68 175 Unit V A W °C
Static characteristics FET1 and FET2 drain-source on-state resistance total gate charge gate-drain charge VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 12 25.1 29 mΩ
Dynamic characteristics FET1 and FET2 QG(tot) QGD ID = 10 A; VDS = 80 V; VGS = 10 V; Tj = 25 °C; Fig. 14; Fig. 15 54 10.9 nC nC
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NXP Semiconductors
BUK9K29-100E
Dual N-channel TrenchMOS logic level FET
Symbol EDS(AL)S
Parameter non-repetitive drains...