C8051F410

www.DataSheet4U.com C8051F410/1/2/3 2.0 V, 32/16 kB Flash, smaRTClock, 12-bit ADC Analog Peripherals - 12-Bit ADC ±1 LSB INL; no missing codes Programmable throughput up to 200 ksps Up to 24 external inputs Data dependent windowed interrupt generator Built-in temperature sensor (±3 °C) Memory - 2304 bytes internal data RAM (256 + 2048) - 32/16 kB Flash; In-system programmable in 512 byte sectors - Two 12-Bit Current Mode DACs Two Comparators - 64 bytes battery-backed RAM (smaRTClock) Digital Peripherals - 24 port I/O; push-pull or open-drain, up to 5.25 V tolerance Hardware SMBus™ (I2C™ Compatible), SPI™, and UART serial ports available concurrently Four general purpose 16-bit counter/timers Programmable 16-bit counter/timer array with six capture/compare modules, WDT Hardware smaRTClock operates down to 1 V with 64 bytes battery-backed RAM and backup voltage regulator Programmable hysteresis and response time Configurable as wake-up or reset source - POR/Brownout Detector - Voltage Reference—1.5, 2.2 V (programmable) On-Chip Debug - On-chip debug circuitry facilitates full-speed, nonintrusive in-system debug (No emulator required) - Provides breakpoints, single stepping - Inspect/modify memory and registers - Complete development kit Supply Voltage 2.0 to 5.25 V - Built-in LDO regulator: 2.1 or 2.5 V High Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Up to 50 MIPS throughput with 50 MHz sy...