CD54AC00, CD74AC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES
D AC Types Feature 1.5-V to 5.5-V Operation
and Balanced Noise...
CD54AC00, CD74AC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES
D AC Types Feature 1.5-V to 5.5-V Operation
and Balanced Noise Immunity at 30% of the
Supply
Voltage
D Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
D Balanced Propagation Delays D ±24-mA Output Drive Current
– Fanout to 15 F Devices
D SCR-Latchup-Resistant
CMOS Process and
Circuit Design
D Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
SCHS303C – JANUARY 2001 – REVISED JUNE 2002
CD54AC00 . . . F PACKAGE CD74AC00 . . . E OR M PACKAGE
(TOP VIEW)
1A 1B 1Y 2A 2B 2Y GND
1 2 3 4 5 6 7
14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y
description
The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function
of Y = A S B or Y = A + B in positive logic.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP – E Tube
CD74AC00E
CD74AC00E
Tube –55°C to 125°C SOIC – M
Tape and reel
CD74AC00M CD74AC00M96
AC00M
CDIP – F Tube
CD54AC00F3A CD54AC00F3A
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE (each gate)
INPUTS AB
OUTPUT Y
HH
L
LX
H
XL
H
logic diagram, each gate (positive logic)
A Y
B
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