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CD54HC162 Datasheet

Part Number CD54HC162
Manufacturers Texas Instruments
Logo Texas Instruments
Description BCD SYNCHRONOUS DECADE COUNTERS
Datasheet CD54HC162 DatasheetCD54HC162 Datasheet (PDF)

CD54HC160, CD54HC162 BCD SYNCHRONOUS DECADE COUNTERS D Synchronous Counting and Loading D Two Count-Enable Inputs for n-Bit Cascading D Asynchronous Reset (CD54HC160) D Synchronous Reset (CD54HC162) D Look-Ahead Carry for High-Speed Counting D Operating Range 2-V to 6-V VCC D EPIC™ (Enhanced-Performance Implanted CMOS) Process D Packaged in Ceramic (F) DIPs SCHS301 – JUNE 2000 CD54HC160, CD54HC162 . . . F PACKAGE (TOP VIEW) CLR CLK A B C D ENP GND 1 2 3 4 5 6 7 8 16 VCC 15 RCO 14 QA 13 QB 1.

  CD54HC162   CD54HC162






Part Number CD54HC166F3A
Manufacturers Texas Instruments
Logo Texas Instruments
Description 8-Bit Parallel-In/Serial-Out Shift Register
Datasheet CD54HC162 DatasheetCD54HC166F3A Datasheet (PDF)

Data sheet acquired from Harris Semiconductor SCHS157C February 1998 - Revised October 2003 CD54HC166, CD74HC166, CD54HCT166, CD74HCT166 High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register [ /Title (CD74 HC166 , CD74 HCT16 6) /Subject (High Speed CMOS Logic 8-Bit ParallelIn/Seri Features Description • Buffered Inputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • .

  CD54HC162   CD54HC162







Part Number CD54HC166
Manufacturers Texas Instruments
Logo Texas Instruments
Description 8-Bit Parallel-In/Serial-Out Shift Register
Datasheet CD54HC162 DatasheetCD54HC166 Datasheet (PDF)

CD54HC166, CD54HCT166, CD74HC166, CD74HCT166 SCHS157D – FEBRUARY 1998 – REVISED FEBRUARY 2022 CDx4HC(T)166 High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register 1 Features 2 Description • Buffered inputs The ’HC166 and ’HCT166 8-bit shift register is • Fanout (over temperature range) fabricated with silicon gate CMOS technology. It – Standard outputs: 10 LSTTL Loads – Bus driver outputs: 15 LSTTL Loads • Wide operating temperature range: -55℃ to 125℃ • Balanced propagation del.

  CD54HC162   CD54HC162







Part Number CD54HC165
Manufacturers Texas Instruments
Logo Texas Instruments
Description 8-Bit Parallel-In/Serial-Out Shift Register
Datasheet CD54HC162 DatasheetCD54HC165 Datasheet (PDF)

Data sheet acquired from Harris Semiconductor SCHS156C February 1998 - Revised October 2003 CD54HC165, CD74HC165, CD54HCT165, CD74HCT165 High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register [ /Title (CD74H C165, CD74H CT165) /Subject (High Speed CMOS Logic 8Bit Parallel- Features Description • Buffered Inputs • Asynchronous Parallel Load • Complementary Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs.

  CD54HC162   CD54HC162







Part Number CD54HC164F
Manufacturers Texas Instruments
Logo Texas Instruments
Description 8-Bit Serial-In/Parallel-Out Shift Register
Datasheet CD54HC162 DatasheetCD54HC164F Datasheet (PDF)

Data sheet acquired from Harris Semiconductor SCHS155C October 1997 - Revised August 2003 CD54HC164, CD74HC164, CD54HCT164, CD74HCT164 High-Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register [ /Title (CD74 HC164 , CD74 HCT16 4) /Subject (High Speed CMOS Logic 8-Bit SerialIn/Parallel- Features Description • Buffered Inputs • Asynchronous Master Reset • TTAyp=ic2a5lofCMAX = 60MHz at VCC = 5V, CL = 15pF, • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . ..

  CD54HC162   CD54HC162







Part Number CD54HC164
Manufacturers Texas Instruments
Logo Texas Instruments
Description 8-Bit Serial-In/Parallel-Out Shift Register
Datasheet CD54HC162 DatasheetCD54HC164 Datasheet (PDF)

Data sheet acquired from Harris Semiconductor SCHS155C October 1997 - Revised August 2003 CD54HC164, CD74HC164, CD54HCT164, CD74HCT164 High-Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register [ /Title (CD74 HC164 , CD74 HCT16 4) /Subject (High Speed CMOS Logic 8-Bit SerialIn/Parallel- Features Description • Buffered Inputs • Asynchronous Master Reset • TTAyp=ic2a5lofCMAX = 60MHz at VCC = 5V, CL = 15pF, • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . ..

  CD54HC162   CD54HC162







BCD SYNCHRONOUS DECADE COUNTERS

CD54HC160, CD54HC162 BCD SYNCHRONOUS DECADE COUNTERS D Synchronous Counting and Loading D Two Count-Enable Inputs for n-Bit Cascading D Asynchronous Reset (CD54HC160) D Synchronous Reset (CD54HC162) D Look-Ahead Carry for High-Speed Counting D Operating Range 2-V to 6-V VCC D EPIC™ (Enhanced-Performance Implanted CMOS) Process D Packaged in Ceramic (F) DIPs SCHS301 – JUNE 2000 CD54HC160, CD54HC162 . . . F PACKAGE (TOP VIEW) CLR CLK A B C D ENP GND 1 2 3 4 5 6 7 8 16 VCC 15 RCO 14 QA 13 QB 12 QC 11 QD 10 ENT 9 LOAD description These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. The CD54HC160 and CD54HC162 are BCD decade counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform. These counters are fully programmable; that is, they can be preset to any number between 0 and 9. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The.


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