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CD54HCT139 Datasheet

Part Number CD54HCT139
Manufacturers Texas Instruments
Logo Texas Instruments
Description Dual 2- to 4-Line Decoder/Demultiplexer
Datasheet CD54HCT139 DatasheetCD54HCT139 Datasheet (PDF)

Data sheet acquired from Harris Semiconductor SCHS148D September 1997 - Revised October 2003 CD54HC139, CD74HC139, CD54HCT139, CD74HCT139 High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer [ /Title (CD74 HC139 , CD74 HCT13 9) /Subject (High Speed CMOS Logic Dual 2-to-4 Line Decod Features • Multifunction Capability - Binary to 1 of 4 Decoders or 1 to 4 Line Demultiplexer • Active Low Mutually Exclusive Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . ..

  CD54HCT139   CD54HCT139






Part Number CD54HCT138F
Manufacturers Texas Instruments
Logo Texas Instruments
Description High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting
Datasheet CD54HCT139 DatasheetCD54HCT138F Datasheet (PDF)

CD54HC138, CD74HC138, CD54HCT138, CD74HCT138, CD54HC238, CD74HC238, CD54HCT238, CD74HCT238 SCHS147J – NOVEMBER 1998 – REVISED NOVEMBER 2021 CDx4HC138, CDx4HCT138, CDx4HC238, CDx4HCT238 High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting 1 Features • Select one of eight data outputs: – Active low for '138 – Active high for '238 • l/O port or memory selector • Three enable inputs to simplify cascading • Typical propagation delay of 13 ns at VCC = 5 V, CL = 15 pF, T.

  CD54HCT139   CD54HCT139







Part Number CD54HCT138
Manufacturers Texas Instruments
Logo Texas Instruments
Description High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting
Datasheet CD54HCT139 DatasheetCD54HCT138 Datasheet (PDF)

CD54HC138, CD74HC138, CD54HCT138, CD74HCT138, CD54HC238, CD74HC238, CD54HCT238, CD74HCT238 SCHS147J – NOVEMBER 1998 – REVISED NOVEMBER 2021 CDx4HC138, CDx4HCT138, CDx4HC238, CDx4HCT238 High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting 1 Features • Select one of eight data outputs: – Active low for '138 – Active high for '238 • l/O port or memory selector • Three enable inputs to simplify cascading • Typical propagation delay of 13 ns at VCC = 5 V, CL = 15 pF, T.

  CD54HCT139   CD54HCT139







Part Number CD54HCT132J
Manufacturers Texas Instruments
Logo Texas Instruments
Description Quadruple 2-Input NAND Gates
Datasheet CD54HCT139 DatasheetCD54HCT132J Datasheet (PDF)

www.ti.com CD74HCT132, CD54HCT132 CD74HSCCTH1S33299, C– JDA5N4UHARCYT2103221 SCHS399 – JANUARY 2021 CDx4HCT132 Quadruple 2-Input NAND Gates with TTL-Compatible Schmitt-Trigger Inputs 1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 µA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTT.

  CD54HCT139   CD54HCT139







Part Number CD54HCT132
Manufacturers Texas Instruments
Logo Texas Instruments
Description Quadruple 2-Input NAND Gates
Datasheet CD54HCT139 DatasheetCD54HCT132 Datasheet (PDF)

www.ti.com CD74HCT132, CD54HCT132 CD74HSCCTH1S33299, C– JDA5N4UHARCYT2103221 SCHS399 – JANUARY 2021 CDx4HCT132 Quadruple 2-Input NAND Gates with TTL-Compatible Schmitt-Trigger Inputs 1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 µA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTT.

  CD54HCT139   CD54HCT139







Dual 2- to 4-Line Decoder/Demultiplexer

Data sheet acquired from Harris Semiconductor SCHS148D September 1997 - Revised October 2003 CD54HC139, CD74HC139, CD54HCT139, CD74HCT139 High-Speed CMOS Logic Dual 2- to 4-Line Decoder/Demultiplexer [ /Title (CD74 HC139 , CD74 HCT13 9) /Subject (High Speed CMOS Logic Dual 2-to-4 Line Decod Features • Multifunction Capability - Binary to 1 of 4 Decoders or 1 to 4 Line Demultiplexer • Active Low Mutually Exclusive Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH • Memory Decoding, Data Routing, Code Conversion Description The ’HC139 and ’HCT139 devices contain two independent binary to one of four decoders each with a single active low enable input (1E or 2E). Data on the select inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four normally high outputs to go low. If the enable input is high all four outputs remain high. For demultiplexer operation the enable input is the data input. The enable input also functions as a chip select when these .


2020-01-25 : CD54HC157    CD74HCT157    CD74HCT158    CD74HC157    CD54HCT158    CD54HC158    CD54HCT157    CD54HCT153    CD74HC153    CD74HCT153   


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