CD54HCT154

Data sheet acquired from Harris Semiconductor SCHS152D September 1997 - Revised June 2004 CD54HC154, CD74HC154, CD54HCT154, CD74HCT154 High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer [ /Title (CD74 HC154 , CD74 HCT15 4) /Subject (High Speed CMOS Logic 4-to-16 Line Decod er/Dem Features Two Enable Inputs to Facilitate Demultiplexing and Cascading Functions Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0 to Y15, and using one enable as the data input while holding the other enable low. Ordering Information PART NUMBER CD54HC154F3A CD54HCT154F3A CD74HC154E CD74HC154EN CD74HC154M CD74HC154M96 CD74HCT154E CD74HCT154EN CD74HCT154M CD74HCT154M96 TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to ...