Data sheet acquired from Harris Semiconductor SCHS222C
February 1998 - Revised October 2003
CD54HC40105, CD74HC40105, C...
Data sheet acquired from Harris Semiconductor SCHS222C
February 1998 - Revised October 2003
CD54HC40105, CD74HC40105, CD54HCT40105, CD74HCT40105
High-Speed
CMOS Logic 4-Bit x 16-Word FIFO Register
[ /Title (CD74 HC401 05, CD74 HCT40 105) /Subject (High Speed
CMOS
Features
Description
Independent Asynchronous Inputs and Outputs
Expandable in Either Direction
Reset Capability
Status Indicators on Inputs and Outputs
Three-State Outputs
Shift-Out Independent of Three-State Control
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) -
CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Applications
Bit-Rate Smoothing
CPU/Terminal Buffering
Data Communications
Peripheral Buffering
Line Printer Input Buffers
Auto-Dialers
CRT Buffer Memories
Radar Data Acquisition
The ’HC40105 and ’HCT40105 are high-speed silicon-gate
CMOS devices that are compatible, except for “shift-out” circuitry, with the CD40105B. They are low-power first-in-out (FIFO) “elastic” storage registers that can store 16 f...