Data sheet acquired from Harris Semiconductor SCHS204J
February 1998 - Revised December 2003
CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A
High-Speed CMOS Logic Phase-Locked Loop with VCO
[ /Title (CD74 HC404 6A, CD74 HCT40 46A) /Subject (HighSpeed CMOS
Features
Description
• Operating Frequency Range - Up to 18MHz (Typ) at VCC = 5V - Minimum Center Frequency of 12MHz at VCC = 4.5V
• Choice of Three Phase Comparators - EXCLUSIVE-OR - Edge-Triggered JK Flip-Flop - Edge-Triggered RS Fl.
Phase-Locked Loop
Data sheet acquired from Harris Semiconductor SCHS204J
February 1998 - Revised December 2003
CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A
High-Speed CMOS Logic Phase-Locked Loop with VCO
[ /Title (CD74 HC404 6A, CD74 HCT40 46A) /Subject (HighSpeed CMOS
Features
Description
• Operating Frequency Range - Up to 18MHz (Typ) at VCC = 5V - Minimum Center Frequency of 12MHz at VCC = 4.5V
• Choice of Three Phase Comparators - EXCLUSIVE-OR - Edge-Triggered JK Flip-Flop - Edge-Triggered RS Flip-Flop
• Excellent VCO Frequency Linearity
• VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption
• Minimal Frequency Drift
• Operating Power Supply Voltage Range - VCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6V - Digital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6V
• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Applications
The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices tha.