Data sheet acquired from Harris Semiconductor SCHS133C
August 1997 - Revised May 2003
CD54HC42, CD74HC42, CD74HCT42
Hig...
Data sheet acquired from Harris Semiconductor SCHS133C
August 1997 - Revised May 2003
CD54HC42, CD74HC42, CD74HCT42
High-Speed
CMOS Logic BCD-to-Decimal Decoders (1 of 10)
[ /Title (CD74H C42, CD74H CT42) /Subject (High Speed
CMOS Logic BCD To Deci-
Features
Description
Buffered Inputs and Outputs
Typical Propagation Delay: CL = 15pF, TA = 25oC
12ns
at
VCC
=
5V,
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55oC to 125oC
The ’HC42 and CD74HCT42 BCD-to-Decimal Decoders utilize silicon-gate
CMOS technology to achieve operating speeds similar to LSTTL decoders with the low power consumption of standard
CMOS integrated circuits. These devices have the capability of driving 10 LSTLL loads and are compatible with the standard LS logic family. One of ten outputs (low on select) is selected in accordance with the BCD input. Non-valid BCD inputs result in none of the outputs being selected (all outputs are high).
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
Ordering Information
PART NUMBER TEMP. RANGE (oC)
PACKAGE
HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) -
CMOS Input Compatibility, Il...