D Low Output Skew for Clock-Distribution
and Clock-Generation Applications
D Operates at 3.3-V VCC D Distributes Differential LVPECL Clock
Inputs to 12 TTL-Compatible Outputs
D Two Select Inputs Configure Up to Nine
Outputs to Operate at One-Half or Double the Input Frequency
D No External RC Network Required
CDC582 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER WITH D...
