CDC706

Not Recommended for New Designs CDC706 www.ti.com...................................................................................................................................... SCAS829B – SEPTEMBER 2006 – REVISED FEBRUARY 2008 PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER Check for Samples: CDC706 FEATURES 1 2 High Performance 3:6 PLL Based Clock Synthesizer / Multiplier / Divider User Programmable PLL Frequencies Easy In-Circuit Programming via SMBus Data Interface Wide PLL Divider Ratio Allows 0-PPM Output Clock Error Clock Inputs Accept a Crystal or a Single-Ended LVCMOS or a Differential Input Signal Accepts Crystal Frequencies from 8 MHz up to 54 MHz Accepts LVCMOS or Differential Input Frequencies up to 200 MHz Two Programmable Control Inputs [S0/S1] for User Defined Control Signals Six LVCMOS Outputs with Output Frequencies up to 300 MHz LVCMOS Outputs can be Programmed for Complementary Signals Free Selectable Output Frequency via Programmable Output Switching Matrix [6x6] Including 7-Bit Post-Divider for Each Output PLL Loop Filter Components Integrated Low Period Jitter (Typical 60 ps) Features Spread Spectrum Clocking (SSC) for Lowering System EMI Programmable Output Slew-Rate Control (SRC) for Lowering System EMI 3.3-V Device Power Supply Industrial Temperature Range –40°C to 85°C Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™) Packaged in 20-Pin TSSOP Factory Progr...