CDCE18005

www.ti.com CDCE18005 SCAS863B – NOVEMBER 2008 – REVISED NOVEMBER 2012 Five/Ten Output Clock Programmable Buffer Check for Samples: CDCE18005 FEATURES 1 Universal Input Buffers That Accept LVPECL, LVDS, or LVCMOS Level Signaling Fully Configurable Outputs Including Frequency, Output Format, and Output Skew Output Multiplexer That Serves as a Clock Switch Between the Three Reference Inputs and the Outputs Clock Generation Via AT-Cut Crystal Integrated EEPROM Determines Device Configuration at Power-up Low Additive Jitter Performance Universal Output Blocks Support up to 5 Differential, 10 Single-ended, or Combinations of Differential or Single-ended: – Low Additive Jitter – Output Frequency up to 1.5 GHz – LVPECL, LVDS, LVCMOS, and Special High Output Swing Modes – Independent Output Dividers Support Divide Ratios from 1–80 – Independent limited Coarse Skew Control on all Outputs Flexible Inputs: – Two Universal Differential Inputs Accept Frequencies up to 1500 MHz (LVPECL), 800 MHz (LVDS), or 250 MHz (LVCMOS). – One Auxiliary Input Accepts Crystal. Auxiliary Input Accepts Crystals in the Range of 2 MHz–42 MHz – Clock Generator Mode Using Crystal Input. Typical Power Consumption 1W at 3.3V (see Table 28) Offered in QFN-48 Package ESD Protection Exceeds 2kV HBM Industrial Temperature Range –40°C to 85°C APPLICATIONS Data Converter and Data Aggregation Clocking Wireless Infrastructure Switches and Routers Medical Electronics Military and Aero...