CDCLVP1216

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCLVP1216 SCAS877F – MAY 2009 – REVISED JANUARY 2016 CDCLVP1216 16-LVPECL Output, High-Performance Clock Buffer 1 Features 1 2:16 Differential Buffer Selectable Clock Inputs Through Control Pin Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL 16 LVPECL Outputs Maximum Clock Frequency: 2 GHz Maximum Core Current Consumption: 110 mA Very Low Additive Jitter: <100 fs, RMS in 10-kHz to 20-MHz Offset Range: – 57 fs, RMS (Typical) at 122.88 MHz – 48 fs, RMS (Typical) at 156.25 MHz – 30 fs, RMS (Typical) at 312.5 MHz 2.375-V to 3.6-V Device Power Supply Maximum Propagation Delay: 550 ps Maximum Output Skew: 30 ps LVPECL Reference Voltage, VAC_REF, Available for Capacitive-Coupled Inputs Industrial Temperature Range: –40°C to +85°C Supports 105°C PCB Temperature (Measured with a Thermal Pad) ESD Protection Exceeds 2000 V (HBM) Available in 7-mm × 7-mm VQFN-48 (RGZ) Package 2 Applications Wireless Communications Telecommunications/Networking Medical Imaging Test and Measurement Equipment INP0 INN0 INP1 INN1 Functional Block Diagram VCC VCC VCC VCC VCC VCC IN_MUX LVPECL OUTP[15...0] 16 OUTN[15...0] 16 IN_SEL VAC_REF Reference Generator GND GND 3 Description The CDCLVP1216 is a highly versatile, low additive jitter buffer that can generate 16 copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a va...