CDRM622

Data Sheet June 1999 www.DataSheet4U.com CDRM622 622 Mbits/s Multichannel Digital Timing Recovery Features s Description The CDRM622 provides a physical medium for highspeed asynchronous serial data transfer between ASIC devices. Devices can be on the same PCboard, or on separate boards connected across a backplane, or connected by cables. The macrocell is intended for, but not limited to, terminal equipment in SONET/SDH and ATM systems. The macrocell consists of three functional blocks. The receiver accepts 622.08 Mbits/s serial data. Based on data transitions, the receiver selects an appropriate 622 MHz clock phase for each channel to retime the data, then demultiplexes down to 77.76 Mbytes/s parallel bytes and a 77.76 MHz clock. The transmitter operates in the reverse direction. 77.76 Mbytes/s parallel bytes are multiplexed up to 662.08 Mbits/s serial data for off-chip communication. The clock synthesizer generates the necessary 622.08 MHz clock for operation from a 77.76 MHz reference. Figure 1 illustrates the function of the macrocell. The hard macrocell can be supplied for up to 16 data channels. Multiple macrocells can be used on a single device. The macrocell is intended to be used with high-speed differential I/O buffers for the 622 Mbits/s serial data streams and the 77.76 MHz reference clock. Common selections are low-voltage differential swing (LVDS) or PECL. The I/O buffers are part of our standard-cell ASIC library and are not included in the macrocell to allo...