CT2N7002E-R3

CT2N7002E-R3 N-Channel Enhancement MOSFET Features Drain-Source Breakdown Voltage VDSS 60 V Drain-Source On-Resistance RDS(ON) 4.15Ω, at VGS= 10V, IDS= 500mA RDS(ON) 4.7Ω, at VGS= 5.0V, IDS= 500mA ℃ Continuous Drain Current at TA=25 ,ID = 500mA Advanced high cell density Trench Technology RoHS Compliance & Halogen Free ESD protection Applications Cellular phone Notebook Power management Description The CT2N7002E-R3 is the N-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. Package Outline Schematic Drain Drain Gate Source Gate Source CT Micro Proprietary & Confidential Page 1 Rev 3 Jun, 2015 CT2N7002E-R3 N-Channel Enhancement MOSFET Absolute Maximum Rating at 25oC Symbol Parameters VDS Drain-Source Voltage VGS Gate-Source Voltage ℃ID Continuous Drain Current @TA=25 IDM Pulsed Drain Current ℃PD Total Power Dissipation @TA=25 TSTG Storage Temperature Range TJ Operating Junction Temperature Range Thermal Characteristics Symbol Parameters RӨJA Thermal Resistance Junction-Ambient (t=10s) Test Conditions Ratings 60 ±20 500 1200 0.35 -55 to 150 -55 to 150 Units V V mA mA W oC oC Notes 1 1 2 Min Typ Max Units Notes - 360 - oC /W 1,4 CT Micro Proprietary & Confidential Page 2 Rev 3 Jun, 2015 CT2N7002E-R3 N-Channel Enhancement MOSFET Electrical Characteristics TA = 25°C (un...