CTH1804PS-T52 P-Channel Enhancement MOSFET
Features
Drain-Source Breakdown Voltage VDSS-40V Drain-Source On-Resistance
RDS(ON) 35m, at VGS= -10V, ID= -12A RDS(ON) 57m, at VGS= -4.5V, ID= -6A
Continuous Drain Current at TC=25℃ID =-18.6A Advanced high cell density Trench Technology RoHS Compliance & Halogen Free
Description
The CTH1804PS-T52 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high d.
P-Channel MOSFET
CTH1804PS-T52 P-Channel Enhancement MOSFET
Features
Drain-Source Breakdown Voltage VDSS-40V Drain-Source On-Resistance
RDS(ON) 35m, at VGS= -10V, ID= -12A RDS(ON) 57m, at VGS= -4.5V, ID= -6A
Continuous Drain Current at TC=25℃ID =-18.6A Advanced high cell density Trench Technology RoHS Compliance & Halogen Free
Description
The CTH1804PS-T52 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance.
Applications
Load Switch DC/DC Converter LCD Display inverter
Package Outline
Schematic
Drain
Gate
Source
Drain Gate
Source
CT Micro Proprietary & Confidential
Page 1
Rev 3 Jun, 2015
CTH1804PS-T52 P-Channel Enhancement MOSFET
Absolute Maximum Rating at 25oC
Symbol
Parameters
VDS Drain-Source Voltage
VGS Gate-Source Voltage
ID Continuous Drain Current @TC=25℃
IDM Pulsed Drain Current
PD Total Power Dissipation @TC=25℃
TSTG
Storage Temperature Range
TJ Operating Junction Temperature Range
Thermal Characteristics
Symbol
Parameters
RӨJC
Thermal Resistance Junction-Case
Test Conditions
Test Conditions -40 ±25 -18.6 -75 25
-55 to 150 -55 to 150
Min Note Vs V A1 A1 W2 °C °C
Min Typ Max Units Notes
-- --
5 oC /W 1,4
CT Micro Proprietary & Confidential
Page 2
Rev 3 Jun, 2015
CTH1804PS-T52 P-Channel Enhancement MOSFET
Electrical Characteristics TC = 25°C (unless otherwise specified).