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CY7C018V RAM Datasheet PDF3.3V 64K/128K x 8/9 Dual-Port Static RAM 3.3V 64K/128K x 8/9 Dual-Port Static RAM |
　
　
　
| Part Number | CY7C018V |
|---|---|
| Description | 3.3V 64K/128K x 8/9 Dual-Port Static RAM |
| Feature | 25/0251
Features
• True Dual-Ported m emory cells which allow simultaneous ac cess of the same memory location • 64 K x 8 organization (CY7C008) • 128K x 8 organization (CY7C009) • 64K x 9 o rganization (CY7C018) • 128K x 9 orga nization (CY7C019) • 0. 35-micron CMOS for optimum speed/power • High-speed access: 15/20/25 ns • Low operating power — Active: ICC = 115 mA (typical ) — Standby: ISB3 = 10 µA (typical) Logic Block Diagram R/WL CE0L CE1L OE L CEL CY7C008V/009V CY7C018V/019V 3. 3 V 64K/128K x 8/9 Dual-Port Static RAM â €¢ Fully asynchronous operation • Aut omatic power-down • Expandable data b us . |
| Manufacture | Cypress |
| Datasheet |
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| Part Number | CY7C018V |
|---|---|
| Description | 3.3V 64K/128K x 8/9 Dual-Port Static RAM |
| Feature | 25/0251
Features
• True Dual-Ported m emory cells which allow simultaneous ac cess of the same memory location • 64 K x 8 organization (CY7C008) • 128K x 8 organization (CY7C009) • 64K x 9 o rganization (CY7C018) • 128K x 9 orga nization (CY7C019) • 0. 35-micron CMOS for optimum speed/power • High-speed access: 15/20/25 ns • Low operating power — Active: ICC = 115 mA (typical ) — Standby: ISB3 = 10 µA (typical) Logic Block Diagram R/WL CE0L CE1L OE L CEL CY7C008V/009V CY7C018V/019V 3. 3 V 64K/128K x 8/9 Dual-Port Static RAM â €¢ Fully asynchronous operation • Aut omatic power-down • Expandable data b us . |
| Manufacture | Cypress |
| Datasheet |
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