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CY7C1148KV18

Cypress Semiconductor

18-Mbit DDR II+ SRAM Two-Word Burst Architecture

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CY7C1148KV18/CY7C1150KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) Features ■ 18-Mbit density (1M × 18, 512K × 36) ■ 450-MHz clock for high bandwidth ■ Two-word burst for reducing address bus frequency ■ Double data rate (DDR) interfaces (data transfer...


Cypress Semiconductor

CY7C1148KV18

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