CY7C1382D

Not Recommended for New Designs. CY7C1380D CY7C1380F CY7C1382D 18-Mbit (512K × 36/1M × 18) Pipelined SRAM 18-Mbit (512K × 36/1M × 18) Pipelined SRAM Features ■ Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200, and 167 MHz ■ Registered inputs and outputs for pipelined operation ■ 3.3 V core power supply ■ 2.5 V or 3.3 V I/O power supply ■ Fast clock-to-output times ❐ 2.6 ns (for 250 MHz device) ■ Provides high performance 3-1-1-1 access rate ■ User selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self-timed write ■ Asynchronous output enable ■ Single cycle chip deselect ■ CY7C1380D/CY7C1382D is available in JEDEC-standard Pb-free 100-pin TQFP package; CY7C1380F is available in non Pb-free 165-ball FBGA package ■ IEEE 1149.1 JTAG-Compatible Boundary Scan ■ ZZ sleep mode option Functional Description The CY7C1380D/...