CY7C1445KV33

CY7C1444KV33 CY7C1445KV33 36-Mbit (1M × 36/2M × 18) Pipelined DCD Sync SRAM 36-Mbit (1M × 36/2M × 18) Pipelined DCD Sync SRAM Features ■ Supports bus operation up to 250 MHz ■ Available speed grades is 250 MHz ■ Registered inputs and outputs for pipelined operation ■ Optimal for performance (double-cycle deselect) ■ Depth expansion without wait state ■ 3.3-V core power supply ■ 2.5-V or 3.3-V I/O power supply ■ Fast clock-to-output times ❐ 2.5 ns (for 250-MHz device) ■ Provide high-performance 3-1-1-1 access rate ■ User-selectable burst counter supporting interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self-timed writes ■ Asynchronous output enable ■ CY7C1444KV33, CY7C1445KV33 available JEDEC-standard Pb-free 100-pin TQFP packages in ■ “ZZ” sleep mode option Functional Description The CY7C1444KV33/CY7C1445KV33 SRAMs integrate 1M × 36/2M × 18 SRAM cells with advanced sy...