DF2S5.1ASL

ESD Protection Diodes Silicon Epitaxial Planar DF2S5.1ASL DF2S5.1ASL 1. Applications ESD Protection Note: This product is designed for protection against electrostatic discharge (ESD) and is not intended for any other purpose, including, but not limited to, voltage regulation. 2. Packaging and Internal Circuit 1: Cathode 2: Anode SL2 3. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25) Characteristics Symbol Note Rating Unit Electrostatic discharge voltage (IEC61000-4-2)(Contact) Electrostatic discharge voltage (IEC61000-4-2)(Air) VESD (Note 1) ±30 kV Peak pulse power(tp = 8/20 µs) Peak pulse current(tp = 8/20 µs) Junction temperature Storage temperature PPK IPP (Note 2) Tj Tstg 30 2.5 150 -55 to 150 W A   Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: According to IEC61000-4-2. Note 2: According to IEC61000-4-5. ©2015 Toshiba Corporation 1 Start of commercial production 2015-11 20...