DS28CN01

DS28CN01 Rev 2; 11/09 ABRIDGED DATA SHEET 1Kb I2C/SMBus EEPROM with SHA-1 Engine General Description The DS28CN01 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the Federal Information Publications (FIPS) 180-1/180-2 and ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The memory is organized as four 32-byte pages. Data copy protection and EPROM emulation features are supported for each memory page. Each DS28CN01 has a guaranteed unique factory-programmed 64-bit registration number. Communication with the DS28CN01 is accomplished through an industrystandard I2C-compatible and SMBus™-compatible interface. The SMBus timeout feature resets the device’s interface if a bus-timeout fault condition is detected. Applications PCB Unique Serialization Accessory and Peripheral Identification Equipment Registration and License Management Network Node Identification Printer Cartridge Configuration and Monitoring Medical Sensor Authentication and Calibration System Intellectual Property Protection Pin Configuration TOP VIEW AD0 1 AD1 2 N.C. 3 GND 4 + DS28CN01 μSOP 8 VCC 7 N.C. 6 SCL 5 SDA Features ♦ 1024 Bits of EEPROM Memory Partitioned Into Four Pages of 256 Bits ♦ Dedicated Hardware-Accelerated SHA-1 Engine for Generating SHA-1 MACs ♦ EEPROM Memory Pages Can Be Individually Copy Protected or Put Into EPROM Mode (Program from 1 to 0 Only) ♦ Write Access Requires Knowledge of the Secret and the Capability of Computing and Transmit...