DS32EL0421

DS32EL0421, DS32ELX0421 www.ti.com SNLS282F – MAY 2008 – REVISED APRIL 2013 DS32EL0421 , DS32ELX0421 125 - 312.5 MHz FPGA-Link Serializer with DDR LVDS Parallel Interface Check for Samples: DS32EL0421, DS32ELX0421 FEATURES 1 2 5-bit DDR LVDS Parallel Data Interface Programmable Transmit De-emphasis Configurable Output Levels (VOD) Selectable DC-balanced Encoder Selectable Data Scrambler Remote Sense for Automatic Detection and Negotiation of Link Status On Chip LC VCOs Redundant Serial Output (ELX device only) Data Valid Signaling to Assist with Synchronization of Multiple Receivers Supports AC- and DC-coupled Signaling Integrated CML and LVDS Terminations Configurable PLL Loop Bandwidth Programmable Output Termination (50Ω or 75Ω). Built-in Test Pattern Generator Loss of Lock and Error Reporting Configurable via SMBus 48-pin WQFN Package with Exposed DAP TARGET APPLICATIONS Imaging: Industrial, Medical Security, Printers Displays: LED Walls, Commercial Video Transport Communication Systems Test and Measurement Industrial Bus DESCRIPTION The DS32EL0421/DS32ELX0421 is a 125 MHz to 312.5 MHz (DDR) serializer for high-speed serial transmission over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. This easy-to-use chipset integrates advanced signal and clock conditioning functions, with an FPGA friendly interface. The DS32EL0421/DS32ELX0421 serializes up to 5 parallel input LVDS channels to create a maxim...