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EDI88128P Datasheet

Part Number EDI88128P
Manufacturers ETC
Logo ETC
Description 128K X 8 STATIC RAM CMOS MONOLITHIC
Datasheet EDI88128P DatasheetEDI88128P Datasheet (PDF)

EDI88128C 128KX8 MONOLITHIC SRAM, SMD 5962-89598 n Access Times of 70, 85, 100ns n Available with Single Chip Selects (EDI88128) or Dual Chip Selects (EDI88130) n 2V Data Retention (LP Versions) n CS and OE Functions for Bus Control n TTL Compatible Inputs and Outputs n Fully Static, No Clocks n Organized as 128Kx8 n Industrial, Military and Commercial Temperature Ranges n Thru-hole and Surface Mount Packages JEDEC Pinout • 32 pin Ceramic DIP, 0.6 mils wide (Package 9) • 32 lead Ceramic SOJ (Pa.

  EDI88128P   EDI88128P






Part Number EDI88128LP
Manufacturers ETC
Logo ETC
Description 128K X 8 STATIC RAM CMOS MONOLITHIC
Datasheet EDI88128P DatasheetEDI88128LP Datasheet (PDF)

EDI88128C 128KX8 MONOLITHIC SRAM, SMD 5962-89598 n Access Times of 70, 85, 100ns n Available with Single Chip Selects (EDI88128) or Dual Chip Selects (EDI88130) n 2V Data Retention (LP Versions) n CS and OE Functions for Bus Control n TTL Compatible Inputs and Outputs n Fully Static, No Clocks n Organized as 128Kx8 n Industrial, Military and Commercial Temperature Ranges n Thru-hole and Surface Mount Packages JEDEC Pinout • 32 pin Ceramic DIP, 0.6 mils wide (Package 9) • 32 lead Ceramic SOJ (Pa.

  EDI88128P   EDI88128P







Part Number EDI88128CS
Manufacturers White Electronic Designs
Logo White Electronic Designs
Description 128Kx8 Monolithic SRAM
Datasheet EDI88128P DatasheetEDI88128CS Datasheet (PDF)

White Electronic Designs EDI88128CS 128Kx8 Monolithic SRAM, SMD 5962-89598 FEATURES „ Access Times of 15*, 17, 20, 25, 35, 45, 55ns „ CS# and OE# Functions for Bus Control „ 2V Data Retention (EDI88128LPS) „ TTL Compatible Inputs and Outputs „ Fully Static, No Clocks • 32 pad Ceramic LCC (Package 141) • 32 lead Ceramic Flatpack (Package 142) „ Single +5V (±10%) Supply OperationThe EDI88128CS is a high speed, high performance, 128Kx8 megabit density Monolithic CMOS Static RAM. „ Organized as.

  EDI88128P   EDI88128P







Part Number EDI88128C
Manufacturers White Electronic Designs
Logo White Electronic Designs
Description 128Kx8 MONOLITHIC SRAM
Datasheet EDI88128P DatasheetEDI88128C Datasheet (PDF)

White Electronic Designs EDI88128C 128Kx8 MONOLITHIC SRAM, SMD 5962-89598 FEATURES „ Access Times of 70, 85, 100ns „ Available with Single Chip Selects (EDI88128) or Dual Chip Selects (EDI88130) „ 2V Data Retention (LP Versions) „ CS# and OE# Functions for Bus Control „ TTL Compatible Inputs and Outputs „ Fully Static, No Clocks „ Organized as 128Kx8 „ Industrial, Military and Commercial Temperature Ranges „ Thru-hole and Surface Mount Packages JEDEC Pinout • 32 pin Ceramic DIP, 0.6 mils wide.

  EDI88128P   EDI88128P







Part Number EDI88128C
Manufacturers ETC
Logo ETC
Description 128K X 8 STATIC RAM CMOS MONOLITHIC
Datasheet EDI88128P DatasheetEDI88128C Datasheet (PDF)

White Electronic Designs EDI88128C 128Kx8 MONOLITHIC SRAM, SMD 5962-89598 FEATURES „ Access Times of 70, 85, 100ns „ Available with Single Chip Selects (EDI88128) or Dual Chip Selects (EDI88130) „ 2V Data Retention (LP Versions) „ CS# and OE# Functions for Bus Control „ TTL Compatible Inputs and Outputs „ Fully Static, No Clocks „ Organized as 128Kx8 „ Industrial, Military and Commercial Temperature Ranges „ Thru-hole and Surface Mount Packages JEDEC Pinout • 32 pin Ceramic DIP, 0.6 mils wide.

  EDI88128P   EDI88128P







128K X 8 STATIC RAM CMOS MONOLITHIC

EDI88128C 128KX8 MONOLITHIC SRAM, SMD 5962-89598 n Access Times of 70, 85, 100ns n Available with Single Chip Selects (EDI88128) or Dual Chip Selects (EDI88130) n 2V Data Retention (LP Versions) n CS and OE Functions for Bus Control n TTL Compatible Inputs and Outputs n Fully Static, No Clocks n Organized as 128Kx8 n Industrial, Military and Commercial Temperature Ranges n Thru-hole and Surface Mount Packages JEDEC Pinout • 32 pin Ceramic DIP, 0.6 mils wide (Package 9) • 32 lead Ceramic SOJ (Package 140) n Single +5V (±10%) Supply Operation FEATURES The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (CS2) can be used to provide system memory security during power down in non-battery backed up systems and simplifiy decoding schemes in memory banking where large multiple pages of memory are required. The EDI88128C and the EDI88130C have eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. Low power versions, EDI88128LP and EDI88130LP, offer a 2V data retention function for battery back-up opperation. Military product is avai.


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