EDI8F8512C

White Electronic Designs 512Kx8 STATIC RAM CMOS, MODULE FEATURES  512Kx8 bit CMOS Static  Random Access Memory Access Times 20 through 100ns Data Retention Function (EDI8F8512LP) TTL Compatible Inputs and Outputs Fully Static, No Clocks  High Density Packaging www.DataSheet4U.com EDI8F8512C DESCRIPTION The EDI8F8512C is a 4096K bit CMOS Static RAM based on four 128Kx8 or 256Kx4 (high speed) Static RAMs mounted on a multilayered epoxy laminate (FR4) substrate. Functional equivalence to the monolithic four megabit Static RAM is achieved by utilization of an on-board decoder that interprets the higher order address(es) to select one of the128Kx8 or 256Kx4 Static RAMs. The 32 pin DIP pinout adheres to the JEDEC standard for the four megabit device, to ensure compatibility with future monolithics. A low power version with data retention (EDI8F8512LP) is also available. All inputs and outputs are TTL compatible and operate from a single 5V supply. Fully asynchronous, the EDI8F8512C requires no clocks or refreshing for operation. 36 Pin SIP, No. 63 32 Pin DIP, JEDEC Pinout, No. 91 (55-100ns) 32 Pin DIP, JEDEC Pinout, No. 183 (20-35ns)  Single +5V (±10%) Supply Operation *This product is subject to change without notice. FIG. 1 PIN CONFIGURATIONS NC VCC W# DQ2 DQ3 DQ0 A1 A2 A3 A4 VSS DQ5 A10 A11 A5 A13 A14 NC E# A15 A16 A12 A18 A6 DQ1 VSS A0 A7 A8 A9 DQ7 DQ4 DQ6 A17 VCC G# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33...