64M bits SDRAM WTR
PRELIMINARY DATA SHEET
64M bits SDRAM WTR (Wide Temperature Range)
EDS6416AHTA-TI (4M words × 16 bits)
Description
The ...
Description
PRELIMINARY DATA SHEET
64M bits SDRAM WTR (Wide Temperature Range)
EDS6416AHTA-TI (4M words × 16 bits)
Description
The EDS6416AHTA is a 64M bits SDRAMs organized as 1,048,576 words × 16 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the www.DataSheet4U.com clock. It is packaged in 54-pin plastic TSOP (II).
Pin Configurations
/xxx indicate active low signal.
54-pin Plastic TSOP (II) VDD DQ0
VDDQ
Features
3.3V power supply Clock frequency: 133MHz (max.) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently Burst read/write operation and burst read/single write operation capability 2 variations of burst sequence Sequential (BL = 1, 2, 4, 8, full page) Interleave (BL = 1, 2, 4, 8) Programmable /CAS latency (CL): 2, 3 Byte control by UDQM and LDQM Refresh cycles: 4096 refresh cycles/64ms 2 variations of refresh Auto refresh Self refresh TSOP (II) package with lead free solder (Sn-Bi) Wide temperature range Ambient temperature range: –40 to +85°C
DQ1 DQ2
VSSQ
DQ3 DQ4
VDDQ
DQ5 DQ6
VSSQ
DQ7 VDD LDQM /WE /CAS /RAS /CS BA0 BA1 A10 A0 A1 A2 A3 VDD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28
VSS DQ15
VSSQ
DQ14 DQ13
VDDQ
DQ12 DQ11
VSSQ
DQ10 DQ9
VDDQ
DQ8 VSS NC UDQM CLK CKE NC A11 A9 A8 A7 A6 A5 A4 VSS
(Top view)
A0 to A11 BA0, BA1 DQ0 to DQ15 /CS /RAS /CAS /WE L...
Similar Datasheet