August 1997
FDS8936S Dual N-Channel Enhancement Mode Field Effect Transistor
GeneralDescription
SO-8 N-Channel enhance...
August 1997
FDS8936S Dual N-Channel Enhancement Mode Field Effect Transistor
GeneralDescription
SO-8 N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to provide superior switching performance and minimize on-state resistance. These devices are particularly suited for low
voltage applications such as disk drive motor control, battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
Low gate charge. 5.0 A, 30 V. RDS(ON) = 0.040 Ω @ VGS = 10 V. High density cell design for extremely low R DS(ON). High power and current handling capability in a widely used surface mount package. Dual
MOSFET in surface mount package.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
5 6 7 8
4 3 2 1
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD Parameter Drain-Source
Voltage Gate-Source
Voltage Drain Current - Continuous - Pulsed
TA = 25oC unless other wise noted FDS8936S 30 ±20
(Note 1a)
Units V V A
5 20 2
Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
W
1.6 1 0.9 -55 to 150 °C
TJ,TSTG RθJA RθJC
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
°C/W °C/W
© 1997 Fairchild Semiconductor Corporat...