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FLL57MK Datasheet

Part Number FLL57MK
Manufacturers Eudyna Devices
Logo Eudyna Devices
Description L-Band Medium & High Power GaAs FET
Datasheet FLL57MK DatasheetFLL57MK Datasheet (PDF)

FLL57MK L-Band Medium & High Power GaAs FET FEATURES • High Output Power: P1dB = 36.0dBm (Typ.) • High Gain: G1dB = 11.5dB (Typ.) • High PAE: ηadd = 37% (Typ.) • Proven Reliability • Hermetically Sealed Package DESCRIPTION The FLL57MK is a Power GaAs FET that is specifically designed to provide high power at L-Band frequencies with gain, linearity and efficiency superior to that of silicon devices. The performance in multitone environments for Class AB operation make them ideally suited for bas.

  FLL57MK   FLL57MK






L-Band Medium & High Power GaAs FET

FLL57MK L-Band Medium & High Power GaAs FET FEATURES • High Output Power: P1dB = 36.0dBm (Typ.) • High Gain: G1dB = 11.5dB (Typ.) • High PAE: ηadd = 37% (Typ.) • Proven Reliability • Hermetically Sealed Package DESCRIPTION The FLL57MK is a Power GaAs FET that is specifically designed to provide high power at L-Band frequencies with gain, linearity and efficiency superior to that of silicon devices. The performance in multitone environments for Class AB operation make them ideally suited for base station applications. Eudyna stringent Quality Assurance Program assures the highest reliability and consistent performance. ABSOLUTE MAXIMUM RATING (Ambient Temperature Ta=25°C) Item Symbol Condition Rating Unit Drain-Source Voltage Gate-Source Voltage VDS VGS Total Power Dissipation PT Tc = 25°C Storage Temperature Tstg Channel Temperature Tch Eudyna recommends the following conditions for the reliable operation of GaAs FETs: 1. The drain-source operating voltage (VDS) should not exceed 10 volts. 2. The forward and reverse gate currents should not exceed 32.2 and -2.2 mA respectively with gate resistance of 100Ω. 3. The operating channel temperature (Tch) should not exceed 145°C. 15 -5 21.4 -65 to +175 175 V V W °C °C ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C) Item Symbol Test Conditions Min. Saturated Drain Current Transconductance IDSS gm VDS = 5V, VGS = 0V VDS = 5V, IDS = 1100mA - Pinch-off Voltage Vp VDS = 5V, IDS = 90mA -1.0 Gate Sour.


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