H5TQ2G43EFR-xxC

2Gb DDR3 SDRAM 2Gb DDR3 SDRAM Lead-Free&Halogen-Free (RoHS Compliant) H5TQ2G43EFR-xxC H5TQ2G83EFR-xxC * SK hynix reserves the right to change products or specifications without notice. Rev. 1.1 / Apr. 2013 1 Free Datasheet http://www.datasheet4u.com/ Revision History Revision No. 0.1 0.2 1.0 1.1 History Initial Release IDD5B spec modified 1.0 version release Editorial PKG Dimension Draft Date Jun. 2012 Nov. 2012 Jan. 2013 Apr. 2013 Remark Rev. 1.1 / Apr. 2013 2 Free Datasheet http://www.datasheet4u.com/ Description The H5TQ2G43EFR-xxC, H5TQ2G83EFR-xxC are a 2Gb CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth. Device Features and Ordering Information FEATURES VDD=VDDQ=1.5V +/- 0.075V Fully differential clock inputs (CK, CK) operation 8banks Average Refresh Cycle (Tcase of 0 oC~ 95 oC) Differential Data Strobe (DQS, DQS) - 7.8 µs at 0oC ~ 85 oC - 3.9 µs at 85oC ~ 95 oC On chip DLL align DQ, DQS and DQS transition with CK  transition JEDEC ...