HCS27MS

HCS27MS September 1995 Radiation Hardened Triple 3-Input NOR Gate Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW A1 1 B1 2 A2 3 B2 4 C2 5 Y2 6 GND 7 14 VCC 13 C1 12 Y1 11 C3 10 B3 9 A3 8 Y3 Features 3 Micron Radiation Hardened SOS CMOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min Input Current Levels Ii ≤ 5µA at VOL, VOH 14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C TOP VIEW A1 B1 A2 B2 C2 Y2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC C1 Y1 C3 B3 A3 Y3 Description The Intersil HCS27MS is a Radiation Hardened Triple 3-Input NOR Gate. A Low on all inputs forces the output to a High state. The HCS27MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS27MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). Functional Diagram (1, 3, 9) An (2, 4, 10) Bn (13, 5, 11) Cn (12, 6, 8) Yn Ordering Informatio...