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HD74HC192 Datasheet

Part Number HD74HC192
Manufacturers Renesas
Logo Renesas
Description Synchronous Up/Down Decade Counter
Datasheet HD74HC192 DatasheetHD74HC192 Datasheet (PDF)

HD74HC192, HD74HC193 Synchronous Up/Down Decade Counter (Dual Clock Lines) Synchronous Up/Down 4-bit Binary Counter (Dual Clock Lines) REJ03D0588-0300 Rev.3.00 Jan 31, 2006 Description The HD74HC192 is a decade counter, and the HD74HC193 is a binary counter. Both counters have two separate clock inputs, an up count input and a down count input. All outputs of the flip-flops are simultaneously triggered on the low to high transition of either clock while the other input is held high. The directi.

  HD74HC192   HD74HC192






Part Number HD74HC192
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description Synchronous Up/Down Decade/4-bit Binary Counter(Dual Clock Line)
Datasheet HD74HC192 DatasheetHD74HC192 Datasheet (PDF)

HD74HC192, HD74HC193 Synchronous Up/Down Decade Counter (Dual Clock Lines) Synchronous Up/Down 4-bit Binary Counter (Dual Clock Lines) REJ03D0588-0300 Rev.3.00 Jan 31, 2006 Description The HD74HC192 is a decade counter, and the HD74HC193 is a binary counter. Both counters have two separate clock inputs, an up count input and a down count input. All outputs of the flip-flops are simultaneously triggered on the low to high transition of either clock while the other input is held high. The directi.

  HD74HC192   HD74HC192







Synchronous Up/Down Decade Counter

HD74HC192, HD74HC193 Synchronous Up/Down Decade Counter (Dual Clock Lines) Synchronous Up/Down 4-bit Binary Counter (Dual Clock Lines) REJ03D0588-0300 Rev.3.00 Jan 31, 2006 Description The HD74HC192 is a decade counter, and the HD74HC193 is a binary counter. Both counters have two separate clock inputs, an up count input and a down count input. All outputs of the flip-flops are simultaneously triggered on the low to high transition of either clock while the other input is held high. The direction of counting is determined by which input is clocked. These counters may be preset by entering the desired data on the data A, data B, data C, and data D inputs. When the load input is taken low the data is loaded independently of either clock input. This feature allows the counters to be used as divide-by-n counters by modifying the count length with the preset inputs. In addition both counters can also be cleared. This is accomplished by inputting a high on the clear input. All 4 internal st.


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