HD74HC490

HD74HC490 Dual 4-bit Decade Counters Description This circuit contains eight master-slave flip-flops and additional gating to implement two individual 4-bit decade counters. Each decade counter has individual clock, clear and set-to-9 inputs. BCD count sequences of any length up to divide-by-100 may be implemented with a single HD74HC490. Buffering on each output is provided to ensure that suceptibility to collector communication is reduced significantly. The counters have paralle outputs from each counter state so that submultiples of the input count frequency are available for system timing signals. Features High Speed Operation: tpd (Clock to QA) = 13 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clear/Set-To-9 Inputs Clear H L L Set-To-9 L H L Outputs QA L H Count QB L L QC L L QD L H HD74HC490 BCD Count Sequence Outputs Count 0 1 2 3 4 5 6 7 8 9 QD L L L L L L L L H H QC L L L L H H H H L L QB L L H H L L H H L L QA L H L H L H L H L H Pin Arrangement 1Clock 1Clear 1QA Output 1 Setto-9 1QB Outputs 1QC 1QD GND 1 2 3 4 CK CLR QA CLR QA 16 VCC 15 2Clock 14 2Clear 13 12 CK QB Set-to-9 QC 2QA Output 2 Setto-9 5 6 7 8 QB QC 11 2QB 10 2QC 9 2QD Outputs Set-to-9 QD QD (Top view) 2 HD74HC490 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = –40 to +85°C Max — — — 0.5 1.35 ...