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HD74HC595 Datasheet

Part Number HD74HC595
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description 8-bit Shift Register/Latch
Datasheet HD74HC595 DatasheetHD74HC595 Datasheet (PDF)

HD74HC595 8-bit Shift Register/Latch (with 3-state outputs) Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading. Both the shift register and storage register clocks are positive-edge tr.

  HD74HC595   HD74HC595






Part Number HD74HC595
Manufacturers Renesas
Logo Renesas
Description 8-bit Shift Register/Latch
Datasheet HD74HC595 DatasheetHD74HC595 Datasheet (PDF)

HD74HC595 8-bit Shift Register/Latch (with 3-state outputs) REJ03D0634-0200 (Previous ADE-205-514) Rev.2.00 Mar 30, 2006 Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading. Both the shi.

  HD74HC595   HD74HC595







8-bit Shift Register/Latch

HD74HC595 8-bit Shift Register/Latch (with 3-state outputs) Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading. Both the shift register and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. Features • • • • • High Speed Operation: tpd (RCK to Q) = 17 ns typ (C L = 50 pF) High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs) Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table RCK X X X X SCK X X SCLR X L H H G H X X X Function QA to QH high impedance Shift register cleared QH ’ = L Shift register clocked Qn = Qn – 1, QA = SER Contents of shift register transferred to output latches HD74HC595 Pin Arrangement QB 1 QC 2 QD 3 QE 4 QF 5 QG 6 QH 7 GND 8 (Top view) 16 VCC 15 QA 14 SER 13 G 12 RCK 11 SCK 10 SCLR 9 QH' Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage Output current DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage .


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