HD74LS42

HD74LS42 BCD-to-Decimal Decoder REJ03D0409–0300 Rev.3.00 Jul.22.2005 This monolithic decimal decoder consists of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by NAND gates. Full decoding of valid input logic ensures that all outputs remain off for all invalid input conditions. Features Ordering Information Part Name Package Type Package Code Package (Previous Code) Abbreviation HD74LS42P DILP-16 pin PRDP0016AE-B (DP-16FV) P HD74LS42FPEL SOP-16 pin (JEITA) PRSP0016DH-B FP (FP-16DAV) HD74LS42RPEL SOP-16 pin (JEDEC) PRSP0016DG-A (FP-16DNV) RP Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity) — EL (2,000 pcs/reel) EL (2,500 pcs/reel) Pin Arrangement 0Y 1 1Y 2 2Y 3 Outputs 3Y 4 4Y 5 5Y 6 6Y 7 GND 8 0 1A 2 3B 4 5 6C 7 8D 9 16 VCC 15 A 14 B 13 C Inputs 12 D 11 9Y 10 8Y Outputs 9 7Y (Top view) Rev.3.00, Jul.22.2005,...