HD74LV1GT126A

www.DataSheet4U.com HD74LV1GT126A Bus Buffer Gate with 3–state Output ADE-205-333B (Z) 3rd. Edition April 2000 Description The HD74LV1GT126A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the minimum value of the resistor is determined by the current souring capability of the driver. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features The basic gate function is lined up as hitachi uni logic series. Supplied on emboss taping for high speed automatic mounting. TTL compatible input level. Supply voltage range : 4.5 to 5.5 V Operating temperature range : –40 to +85°C All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Output current ±12 mA (@VCC = 4.5 V to 5.5 V) All the logical input has hysteresis voltage for the slow transition. HD74LV1GT126A Outline and Article Indication HD74LV1GT126A Index band Marking T C CMPAK–5 = Control code ( or blank) Function Table Inputs OE H H L H : High level L : Low level X : Immaterial Z : High impedance A H L X H L Z Output Y 2 HD74LV1GT126A Pin Arrangement OE 1 5 VCC A 2 GND 3 4 Y (Top view) 3 HD74LV1GT126A Absolute Maximum Ratings It...