HM628512BFP

HM628512BFP Series 4 M SRAM (512-kword × 8-bit) ADE-203-1078B (Z) Rev. 2.0 Nov. 23, 1999 Description The Hitachi HM628512BFP is a 4-Mbit static RAM organized 512-kword × 8-bit. It realizes higher density, higher performance and low power consumption by employing Hi-CMOS process technology. It is packaged in standard 32-pin SOP. Features Single 5 V supply Access time: 55/70 ns (max) Power dissipation  Active: 50 mW/MHz (typ)  Standby: 2 mW (max) Completely static memory. No clock or timing strobe required Equal access and cycle times Common data input and output: Three state output Directly TTL compatible: All inputs and outputs Ordering Information Type No. HM628512BFP-5 HM628512BFP-7 Access time 55 ns 70 ns Package 525-mil 32-pin plastic SOP (FP-32D) HM628512BFP Series Pin Arrangement 32-pin SOP A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3 Pin Description Pin name A0 to A18 I/O0 to I/O7 CS OE WE VCC VSS Function Address input Data input/output Chip select Output enable Write enable Power supply Ground 2 HM628512BFP Series Block Diagram V CC V SS A18 A16 A1 A0 A2 A12 A14 A3 A7 A6 Row Decoder Memory Matrix 1,024 × 4,096 I/O0 Input Data Control I/O7 Column I/O Column Decoder A10 A4 A5 A13 A17A15A8 A9 A11 CS WE OE Timing Pulse Generator Read/Write Contro...