HM62V16256C Series
4 M SRAM (256-kword × 16-bit)
ADE-203-1099D (Z) Rev. 1.0 Jan. 31, 2001
Description
The Hitachi HM62...
HM62V16256C Series
4 M SRAM (256-kword × 16-bit)
ADE-203-1099D (Z) Rev. 1.0 Jan. 31, 2001
Description
The Hitachi HM62V16256C Series is 4-Mbit static RAM organized 262,144-word × 16-bit. HM62V16256C Series has realized higher density, higher performance and low power consumption by employing
CMOS process technology (6-transistor memory cell). It offers low power standby power dissipation; therefore, it is suitable for battery backup systems. It is packaged in standard 44-pin plastic TSOPII.
Features
Single 2.5 V and 3.0 V supply: 2.2 V to 3.6 V Fast access time: 55 ns/70 ns (max) Power dissipation: Active: 5.0 mW/MHz (typ)(VCC = 2.5 V) : 6.0 mW/MHz (typ) (VCC = 3.0 V) Standby: 2 µW (typ) (VCC = 2.5 V) : 2.4 µW (typ) (V CC = 3.0 V) Completely static memory. No clock or timing strobe required Equal access and cycle times Common data input and output. Three state output Battery backup operation. 2 chip selection for battery backup
HM62V16256C Series
Ordering Information
Type No. HM62V16256CLTT-5 HM62V16256CLTT-7 HM62V16256CLTT-5SL HM62V16256CLTT-7SL Access time 55 ns 70 ns 55 ns 70 ns Package 400-mil 44-pin plastic TSOPII (normal-bend type) (TTP-44DB)
2
HM62V16256C Series
Pin Arrangement
44-pin TSOP A4 A3 A2 A1 A0 CS1 I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A17 A16 A15 A14 A13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 (Top view) 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB I/O15 I/O14...